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2017 | Computing & IT
This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques for high-level fault simulation and reliability estimation as well as architecture-level and system-level fault tolerant designs. It also presents a survey of state-of-the-art problems and solutions, offering insights into reliability issues in digital design and their cross-layer countermeasures.
Zheng Wang
(Author)
| Published by | Springer Verlag, Singapore |
| Edition | Unknown |
| ISBN | 9789811010729 |
| Language | N/A |
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